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RC5057
High Performance Programmable Synchronous DC-DC Controller for Low Voltage Microprocessors
Features
* Programmable output from 1.3V to 3.5V using an integrated 5-bit DAC * Remote sense * Active Droop * 85% efficiency typical at full load * Integrated Power Good and Enable/Soft Start functions * Drives N-channel MOSFETs * Overcurrent protection using MOSFET sensing * 16 pin SOIC package * Meets Intel Pentium II & III specifications using minimum number of external components
Description
The RC5057 is a synchronous mode DC-DC controller IC which provides a highly accurate, programmable output voltage for all Pentium II & III CPU applications and other high-performance processors. The RC5057 features remote voltage sensing, adjustable current limit, and active droop for optimal converter transient response. The RC5057 uses a 5-bit D/A converter to program the output voltage from 1.3V to 3.5V. The RC5057 uses a high level of integration to deliver load currents in excess of 16A from a 5V source with minimal external circuitry. Synchronous-mode operation offers optimum efficiency over the entire specified output voltage range. An on-board precision low TC reference achieves tight tolerance voltage regulation without expensive external components, while active droop permits exact tailoring of voltage for the most demanding load transients. The RC5057 also offers integrated functions including Power Good, Output Enable/ Soft Start and current limiting, and is available in a 16 pin SOIC package.
Applications
* * * * * Power supply for Pentium(R) II & III VRM for Pentium II & III processor Telecom line cards Routers, switches & hubs Programmable step-down power supply
Block Diagram
+5V VCCA 5 + 3 RS 10 4 8 VCCP 9 HIDRV +12V +5V
OSC +
Digital Control + + 7 6 5-Bit DAC
16 15141312
VO LODRV GNDP Power Good 2 PWRGD
1.24V Reference 11 GNDA 1 ENABLE/SS
VID0 VID2 VID4 VID1 VID3
Pentium is a registered trademark of Intel Corporation
Rev. 1.2.0
RC5057
PRODUCT SPECIFICATION
Pin Assignments
ENABLE/SS PWRGD IFB VFB VCCA GNDP LODRV VCCP
1 2 3 4 5 6 7 8
RC5057
16 15 14 13 12 11 10 9
VID0 VID1 VID2 VID3 VID4 GNDA SW HIDRV
Pin Definitions
Pin Number 1 Pin Name ENABLE/SS Pin Function Description Output Enable/Softstart. A logic LOW on this pin will disable the output. An internal current source allows for open collector control. This pin also doubles as soft start. Power Good Flag. An open collector output that will be logic LOW if the output voltage is not within 12% of the nominal output voltage setpoint. Current Feedback. Pin 3 is used in conjunction with pin 10, as the input for the current feedback control loop. Layout of these traces is critical to system performance. See Application Information for details. Voltage Feedback. Pin 4 is used as the input for the voltage feedback control loop. See Application Information for details regarding correct layout. Analog VCC. Connect to system 5V supply and decouple with a 0.1F ceramic capacitor. Power Ground. Return pin for high currents flowing in pin 8 (VCCP). Connect to a low impedance ground. Low Side FET Driver. Connect this pin to the gate of an N-channel MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should be <0.5". Power VCC. For both high side and low side FET drivers. Connect to system 12V supply, and decouple with a 4.7F tantalum and a 0.1F ceramic capacitor. High Side FET Driver. Connect this pin to the gate of an N-channel MOSFET. The trace from this pin to the MOSFET gate should be <0.5". High side driver source and low side driver drain switching node. Together with IFB pin allows FET sensing for current. Analog Ground. Return path for low power analog circuitry. This pin should be connected to a low impedance system ground plane to minimize ground loops. Voltage Identification Code Inputs. These open collector/TTL compatible inputs will program the output voltage over the ranges specified in Table 2. Pull-up resistors are internal to the controller.
2 3
PWRGD IFB
4 5 6 7
VFB VCCA GNDP LODRV
8 9 10 11 12-16
VCCP HIDRV SW GNDA VID0-4
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RC5057
Absolute Maximum Ratings
Supply Voltage VCCA to GND Supply Voltage VCCP to GND Voltage Identification Code Inputs, VID0-VID4 Junction Temperature, TJ Storage Temperature Lead Soldering Temperature, 10 seconds Power Dissipation, PD Thermal Resistance Junction-to-case, JC 13.5V 15V VCCA 150C -65 to 150C 300C 750mW 105C/W
Recommended Operating Conditions
Parameter Supply Voltage VCCA Input Logic HIGH Input Logic LOW Ambient Operating Temperature Output Driver Supply, VCCP 0 11.4 12 Conditions Min. 4.5 2.0 0.8 70 13.2 Typ. 5 Max. 5.25 Units V V V C V
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Electrical Specifications (VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25C using circuit in Figure 1,
unless otherwise noted.)
The * denotes specifications which apply over the full operating temperature range. Parameter Output Voltage Output Current Initial Voltage Setpoint ILOAD = 0.8A, VOUT = 2.400V VOUT = 2.000V VOUT = 1.550V TA = 0 to 70C, VOUT = 2.000V VOUT = 1.550V VCCA = 4.75V to 5.25V, VOUT = 2.000V VOUT at ILOAD = 0.8A to Imax 20MHz BW, ILOAD = Imax VOUT = 2.000V VOUT = 1.550V3 ILOAD = 0.8A to Imax,VOUT = 2.000V VOUT = 1.550V3 ILOAD = Imax, VOUT = 2.0V See Figure 4 for tR and tF See Figure 7 for tDT * Logic HIGH Logic LOW * * * * Current4 * 5 255 0 93 88 3.74 7.65 4 8.5 19 40 10 17 * * * * * 1.940 1.480 1.900 1.480 45 85 50 50 300 345 100 107 112 4.26 9.35 * * * -44 2.394 2.000 1.550 See Table 1 Conditions * Min. 1.3 18 2.424 2.020 1.565 +8 +6 2 -40 11 2.070 1.590 2.100 1.590 60 -36 2.454 2.040 1.580 Typ. Max. 3.5 Units V A V V V mV mV mV mV mVpk V V A % nsec nsec kHz % %Vout V V mA mA A
Output Temperature Drift Line Regulation Internal Droop3 Output Ripple Total Output Variation, Steady State1 Total Output Variation, Transient2 Short Circuit Detect Current Efficiency Output Driver Rise & Fall Time Output Driver Deadtime Oscillator Frequency Duty Cycle PWRGD Threshold VCCA UVLO VCCP UVLO VCCA Supply Current VCCP Supply Soft Start Current
Notes: 1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is measured at the converter's VFB sense point. 2. As measured at the converter's VFB sense point. For motherboard applications, the PCB layout should exhibit no more than 0.5m trace resistance between the converter's output capacitors and the CPU. Remote sensing should be used for optimal performance. 3. Using the VFB pin for remote sensing of the converter's output at the load, the converter will be in compliance with Intel's VRM 8.4 specification of +50, -80mV. If Intel specifications on maximum plane resistance from the converter's output capacitors to the CPU are met, the specification of +40, -70mV at the capacitors will also be met. 4. Includes gate current.
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Table 1. Output Voltage Programming Codes
VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Nominal VOUT 1.30V 1.35V 1.40V 1.45V 1.50V 1.55V 1.60V 1.65V 1.70V 1.75V 1.80V 1.85V 1.90V 1.95V 2.00V 2.05V 2.0V 2.1V 2.2V 2.3V 2.4V 2.5V 2.6V 2.7V 2.8V 2.9V 3.0V 3.1V 3.2V 3.3V 3.4V 3.5V
Note: 1. 0 = processor pin is tied to GND. 1 = processor pin is open.
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Typical Operating Characteristics (VCCA = 5V, VCCP = 12V, and TA = +25C using circuit in Figure
1, unless otherwise noted.)
Efficiency vs. Output Current 2.04 88 86 Efficiency (%) 84 82 80 78 76 74 72 70 68 66 64 VOUT = 1.550V VOUT = 2.000V 2.03 2.02 2.01 VOUT (V) 2.00 1.99 1.98 1.97 1.96 1.95 1.94 0 3 6 9 12 15 18 Output Current (A) 0 3 6 9 12 15 18 Output Current (A) Droop, VOUT = 2.0V
Output Voltage vs. Output Current 3.5 3.0 2.5 VOUT (V) 2.0 1.5 1.0 0.5 0 0 5 10 15 20 25 Output Current (A)
Output Programming, VID4 = 0 2.1 1.9 VOUT (V) VOUT (V) 1.7 1.5 1.3 1.1 1.30 3.5 3.0 2.5 2.0 1.5 1.0 1.40 1.50 1.60 1.70 1.80 1.90 2.00
Output Programming, VID4 = 1
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 DAC Setpoint
DAC Setpoint
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Typical Operating Characteristics (continued)
Output Ripple, 2.0V @ 18A
Transient Response, 12.5A to 0.5A
VOUT (20mV/div)
VCPU (50mV/div)
1.590V 1.550V 1.480V
Time (1s/division)
Time (100s/div)
Transient Response, 0.5A to 12.5A
VCPU (50mV/div)
1.590V 1.550V 1.480V
Time (100s/div)
Switching Waveforms, 18A Load
Output Startup, System Power-up
5V/div
HIDRV pin
5V/ div
LODRV pin
Time (1s/division)
VOUT (1V/div)
VIN (2V/div)
Time (10ms/division)
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Typical Operating Characteristics (continued)
Output Startup from Enable 2.042 VOUT (1V/div) ENABLE (2V/div) 2.040 2.038 VOUT (V) 2.036 2.034 2.030 2.028 2.026 0 Time (10ms/division) 25 Temperature (C) 70 100 VOUT Temperature Variation
Application Circuit
+12V L1 (Optional) 2.5H +5V CIN* R1 33 C5 1F C2 1F R2 4.7 Q1 C1 4.7F 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 R3 4.7 Q2 L2 1.3H VO D1 MBRD835L COUT*
R6 10
VID4 VID3 VID2 VID1 VID0
U1 RC5057
C3 0.1F R5*
ENABLE/SS C4 0.1F
VCC R4 10K PWRGD C6 0.1F
*Refer to Appendix for values of COUT, R5, and CIN.
Figure 1. Typical Application Circuit (Worst Case Analyzed! See Appendix for Details)
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Table 2. RC5057 Application Bill of Materials
(Components based on Worst Case Analysis--See Appendix for Details) Reference C1 C2, C5 C3-4,6 CIN COUT D1 L1 L2 Q1 Manufacturer Part # AVX TAJB475M010R5 Panasonic ECU-V1C105ZFX Panasonic ECU-V1H104ZFX Sanyo 10MV1200GX Sanyo 6MV1500GX Motorola MBRD835L Any Any Fairchild FDP6030L or FDB6030L Fairchild FDP7030BL or FDB7030BL Any Any Any Any Any Fairchild RC5057M Quantity 1 2 3 * * 1 Optional 1 1 Description 4.7F, 10V Capacitor 1F, 16V Capacitor 100nF, 50V Capacitor 1200F, 10V Electrolytic 1500F, 6.3V Electrolytic 8A Schottky Diode 2.5H, 10A Inductor 1.3H, 20A Inductor N-Channel MOSFET (TO-220 or TO-263) N-Channel MOSFET (TO-220 or TO-263) 33 4.7 10K * 10 DC/DC Controller DCR ~ 6m See Note 1. DCR ~ 2m RDS(ON) = 20m @ VGS = 4.5V See Note 2. RDS(ON) = 10m @ VGS = 4.5V See Note 2. IRMS = 2A ESR 44m Requirements/Comments
Q2
1
R1 R2-3 R4 R5 R6 U1 *See Appendix.
1 2 1 1 1 1
Notes: 1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. L1 may be omitted if desired. 2. For designs using the TO-220 MOSFETs, heatsinks with thermal resistance SA < 20C/W should be used. For designs using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletin AB-8.
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+12V L1 (Optional) 2.5H +5V CIN* C5 1F D2 1N4148 R2 4.7 Q1 C1 4.7F R3 4.7 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 Q2 L2 R10 10m 1.3H D1 MBRD835L R7 2.2m VO COUT* R1 33
R6 10
C2 1F
VID4 VID3 VID2 VID1 VID0
U1 RC5057
C3 0.1F R5 2.80K
R8 2.1 R9 1K VCC
ENABLE/SS C4 0.1F
R4 10K PWRGD C6 0.1F
*Refer to Table 4 for values of COUT, and CIN.
Figure 2. Application Circuit for Coppermine/Camino Processors
(Worst Case Analyzed! See Appendix for Details)
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RC5057
Table 3. RC5057 Application Bill of Materials for Coppermine/Camino Processors
(Components based on Worst Case Analysis--See Appendix for Details) Reference C1 C2, C5 C3-4,6 CIN COUT D1 D2 L1 L2 Q1 Q2 Manufacturer Part # AVX TAJB475M010R5 Panasonic ECU-V1C105ZFX Panasonic ECU-V1H104ZFX Sanyo 10MV1200GX Sanyo 6MV1500GX Motorola MBRD835L Fairchild 1N4148 Any Any Fairchild FDP6030L or FDB6030L Fairchild FDP7030BL or FDB7030BL Any Any Any Any Any N/A Any Any Dale WSL-2512-.01 Fairchild RC5057M Quantity 1 2 3 3 10 1 1 Optional 1 1 1 Description 4.7F, 10V Capacitor 1F, 16V Capacitor 100nF, 50V Capacitor 1200F, 10V Electrolytic 1500F, 6.3V Electrolytic 8A Schottky Diode Signal Diode 2.5H, 10A Inductor 1.3H, 20A Inductor N-Channel MOSFET (TO-220 or TO-263) N-Channel MOSFET (TO-220 or TO-263) 33 4.7 10K 2.80K 10 1.8m 2.1 1K 10m, 1W Resistor DC/DC Controller PCB Trace Resistor DCR ~ 6m See Note 1. DCR ~ 2m RDS(ON) = 20m @ VGS = 4.5V See Note 2. RDS(ON) = 10m @ VGS = 4.5V See Note 2. IRMS = 2A ESR 44m Requirements/Comments
R1 R2-3 R4 R5 R6 R7 R8 R9 R10 U1
1 2 1 1 1 1 1 1 1 1
Notes: 1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. L1 may be omitted if desired. 2. For designs using the TO-220 MOSFETs, heatsinks with thermal resistance SA < 20C/W should be used. For designs using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletin AB-8.
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+12V L1 (Optional) 2.5H +5V CIN* C5 1F C2 1F R2 4.7 Q1 C1 4.7F 9 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 R3 4.7 Q2 L2 1.3H D1 MBRD835L R1 33
R6 10
R7 3m VO COUT*
VID4 VID3 VID2 VID1 VID0
U1 RC5057
C3 0.1F R5 6.24K
ENABLE/SS C4 0.1F
VCC R4 10K PWRGD C6 0.1F
*Refer to Table 4 for values of COUT, and CIN.
Figure 3. Application Circuit for Coppermine/Camino Processors
(Typical Design)
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Table 4. RC5057 Application Bill of Materials for Coppermine/Camino Processors
(Typical Design) Reference C1 C2, C5 C3-4,6 CIN COUT D1 L1 L2 Q1-2 Manufacturer Part # AVX TAJB475M010R5 Panasonic ECU-V1C105ZFX Panasonic ECU-V1H104ZFX Sanyo 10MV1200GX Sanyo 6MV1500GX Motorola MBRD835L Any Any Fairchild FDP6030L or FDB6030L Any Any Any Any Any N/A Fairchild RC5057M Quantity 1 2 3 3 8 1 Optional 1 2 Description 4.7F, 10V Capacitor 1F, 16V Capacitor 100nF, 50V Capacitor 1200F, 10V Electrolytic IRMS = 2A 1500F, 6.3V Electrolytic 3A Schottky Diode 2.5H, 10A Inductor 1.3H, 20A Inductor N-Channel MOSFET (TO-220 or TO-263) 33 4.7 10K 6.24K 10 3.0m DC/DC Controller PCB Trace Resistor DCR ~ 6m See Note 1. DCR ~ 2m RDS(ON) = 20m @ VGS = 4.5V See Note 2. ESR 44m Requirements/Comments
R1 R2-3 R4 R5 R6 R7 U1
1 2 1 1 1 1 1
Notes: 1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. L1 may be omitted if desired. 2. For designs using the TO-220 MOSFETs, heatsinks with thermal resistance SA < 20C/W should be used. For designs using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletin AB-8.
Test Parameters
tR 90% 10% tDT 2V 2V 90% 2V tDT 2V LODRV 10% tF HIDRV
Figure 4. Output Drive Timing Diagram
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Application Information
The RC5057 Controller
The RC5057 is a programmable synchronous DC-DC controller IC. When designed around the appropriate external components, the RC5057 can be configured to deliver more than 16A of output current, as appropriate for the Katmai and Coppermine and other processors. The RC5057 functions as a fixed frequency PWM step down regulator.
Internal Voltage Reference
The reference included in the RC5057 is a precision band-gap voltage reference. Its internal resistors are precisely trimmed to provide a near zero temperature coefficient (TC). Based on the reference is the output from an integrated 5-bit DAC. The DAC monitors the 5 voltage identification pins, VID0-4. When the VID4 pin is at logic HIGH, the DAC scales the reference voltage from 2.0V to 3.5V in 100mV increments. When VID4 is pulled LOW, the DAC scales the reference from 1.30V to 2.05V in 50mV increments. All VID codes are available, including those below 1.80V.
Main Control Loop
Refer to the RC5057 Block Diagram on page 1. The RC5057 implements "summing mode control", which is different from both classical voltage-mode and current-mode control. It provides superior performance to either by allowing a large converter bandwidth over a wide range of output loads. The control loop of the regulator contains two main sections: the analog control block and the digital control block. The analog section consists of signal conditioning amplifiers feeding into a comparator which provides the input to the digital control block. The signal conditioning section accepts input from the IFB (current feedback) and VFB (voltage feedback) pins and sets up two controlling signal paths. The first, the voltage control path, amplifies the difference between the VFB signal and the reference voltage from the DAC and presents the output to one of the summing amplifier inputs. The second, current control path, takes the difference between the IFB and SW pins when the high-side MOSFET is on, reproducing the voltage across the MOSFET and thus the input current; it presents the resulting signal to another input of the summing amplifier. These two signals are then summed together. This output is then presented to a comparator looking at the oscillator ramp, which provides the main PWM control signal to the digital control block. The digital control block takes the analog comparator input and the main clock signal from the oscillator to provide the appropriate pulses to the HIDRV and LODRV output pins. These two outputs control the external power MOSFETs. There is an additional comparator in the analog control section whose function is to set the point at which the RC5057 current limit comparator disables the output drive signals to the external power MOSFETs.
Power Good (PWRGD)
The RC5057 Power Good function is designed in accordance with the Pentium II & III DC-DC converter specifications and provides a continuous voltage monitor on the VFB pin. The circuit compares the VFB signal to the VREF voltage and outputs an active-low interrupt signal to the CPU should the power supply voltage deviate more than 12% of its nominal setpoint. The output is guaranteed open-collector high when the power supply voltage is within 7% of its nominal setpoint. The Power Good flag provides no other control function to the RC5057.
Output Enable/Soft Start (ENABLE/SS)
The RC5057 will accept an open collector/TTL signal for controlling the output voltage. The low state disables the output voltage. When disabled, the PWRGD output is in the low state. Even if an enable is not required in the circuit, this pin should have attached a capacitor (typically 100nF) to softstart the switching. A larger value may occasionally be required if the converter has a very large capacitor at its output.
Over-Voltage Protection
The RC5057 constantly monitors the output voltage for protection against over-voltage conditions. If the voltage at the VFB pin exceeds the selected program voltage, an over-voltage condition is assumed and the RC5057 disables the output drive signal to the external high-side MOSFET. The DC-DC converter returns to normal operation after the fault has been removed. If it is desired to have an active over-voltage protection circuit, the RC5052, which includes all the features of the RC5057, may be chosen instead of the RC5057.
High Current Output Drivers
The RC5057 contains two identical high current output drivers that utilize high speed bipolar transistors in a push-pull configuration. The drivers' power and ground are separated from the chip's power and ground for switching noise immunity. The power supply pin, VCCP, is supplied from an external 12V source through a series resistor. The resulting voltage is sufficient to provide the gate to source drive to the external MOSFETs required in order to achieve a low RDS,ON.
Oscillator
The RC5057 oscillator section uses a fixed frequency of operation of 300KHz. If it is desired to adjust this frequency for reasons of efficiency or component size, the RC5052, which includes all of the features of the RC5057, may be chosen instead of the RC5057.
Design Considerations and Component Selection
Additional information on design and component selection may be found in Fairchild's Application Note 57.
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MOSFET Selection
This application requires N-channel Logic Level Enhancement Mode Field Effect Transistors. Desired characteristics are as follows: * Low Static Drain-Source On-Resistance, RDS,ON < 20m (lower is better) * Low gate drive voltage, VGS = 4.5V rated * Power package with low Thermal Resistance * Drain-Source voltage rating > 15V.
Dm = Maximum duty cycle for the DC/DC converter (usually 95%). Some margin should be maintained away from both Lmin and Lmax. Adding margin by increasing L almost always adds expense since all the variables are predetermined by system performance except for Co, which must be increased to increase L. Adding margin by decreasing L can be done by purchasing capacitors with lower ESR. The RC5057 provides significant cost savings for the newer CPU systems that typically run at high supply current.
The on-resistance (RDS,ON) is the primary parameter for MOSFET selection. The on-resistance determines the power dissipation within the MOSFET and therefore significantly affects the efficiency of the DC-DC Converter. For details and a spreadsheet on MOSFET selection, refer to Applications Bulletin AB-8.
RC5057 Short Circuit Current Characteristics
The RC5057 protects against output short circuit by turning off both the high-side and low-side MOSFETs and resetting softstart. The short circuit limit is set with the R5 resistor, as given by the formula
R5 = ISC x RDS, on IDetect
Inductor Selection
Choosing the value of the inductor is a tradeoff between allowable ripple voltage and required transient response. The system designer can choose any value within the allowed minimum to maximum range in order to either minimize ripple or maximize transient performance. The first order equation (close approximation) for minimum inductance is:
Lmin = (Vin - Vout) f x Vout Vin ESR x Vripple
where: Vin = Input Power Supply Vout = Output Voltage f = DC/DC converter switching frequency ESR = Equivalent series resistance of all output capacitors in parallel
with IDetect 50A, ISC the desired current limit, and RDS,on the high-side MOSFET's on resistance. Remember to make R5 large enough to include the effects of initial tolerance and temperature variation on the MOSFET's RDS,on. However, the value of R5 should be less than 8.3K. If a greater value is necessary, a lower RDS,on MOSFET should be used instead. Alternately, use of a sense resistor in series with the source of the MOSFET, as shown in Figure 6, eliminates this source of inaccuracy in the current limit. Note the addition of the diode, which is necessary for proper operation of this circuit. As an example, Figure 5 shows the typical characteristic of the DC-DC converter circuit with an FDB6030L high-side MOSFET (RDS = 20m maximum at 25C * 1.25 at 75C = 25m) and a 8.2K R5.
3.5 3.0 2.5 VOUT (V)
Vripple = Maximum peak to peak output ripple voltage budget. The first order equation for maximum allowed inductance is:
Lmax = 2C0 (Vin - Vout) Dm Vtb Ipp2
2.0 1.5 1.0 0.5 0 0 5 10 15 20 25 Output Current (A)
where: Co = The total output capacitance Ipp = Maximum to minimum load transient current Vtb = The output voltage tolerance budget allocated to load transient
Figure 5. RC5057 Short Circuit Characteristic
The converter exhibits a normal load regulation characteristic until the voltage across the MOSFET exceeds the internal short circuit threshold of 50A * 8.2K = 410mV, which occurs at 410mV/25m = 16.4A. (Note that this current limit level can be as high as 410mV/15m = 27A, if the MOSFET
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has typical RDS,on rather than maximum, and is at 25C. This is the reason for using the external sense resistor.) At this point, the internal comparator trips and signals the controller to discharge the softstart capacitor. This causes a drastic reduction in the output voltage as the load regulation collapses into the short circuit control mode. With a 40m output short, the voltage is reduced to 16.4A * 40m = 650mV. The output voltage does not return to its nominal value until the output current is reduced to a value within the safe operating range for the DC-DC converter.
1N4148
The output capacitance should also include a number of small value ceramic capacitors placed as close as possible to the processor; 0.1F and 0.01F are recommended values.
Input Filter
The DC-DC converter design may include an input inductor between the system +5V supply and the converter input as shown in Figure 7. This inductor serves to isolate the +5V supply from the noise in the switching portion of the DC-DC converter, and to limit the inrush current into the input capacitors during power up. A value of 2.5H is recommended. It is necessary to have some low ESR aluminum electrolytic capacitors at the input to the converter. These capacitors deliver current when the high side MOSFET switches on. Figure 7 shows 3 x 1000F, but the exact number required will vary with the speed and type of the processor. For the top speed Katmai and Coppermine, the capacitors should be rated to take 9A and 6A RMS of ripple current respectively. Capacitor ripple current rating is a function of temperature, and so the manufacturer should be contacted to find out the ripple current rating at the expected operational temperature. For details on the design of an input filter, refer to Applications Bulletin AB-15.
2.5H 5V 0.1F Vin 1000F, 10V Electrolytic
R5 IFB RSENSE SW VOUT
Figure 6. Precision Current Sensing
Schottky Diode Selection
The application circuit of Figure 1 shows a Schottky diode, D1, which is used as a free-wheeling diode to assure that the body-diode in Q2 does not conduct when the upper MOSFET is turning off and the lower MOSFET is turning on. It is undesirable for this diode to conduct because its high forward voltage drop and long reverse recovery time degrades efficiency, and so the Schottky provides a shunt path for the current. Since this time duration is very short, the selection criterion for the diode is that the forward voltage of the Schottky at the output current should be less than the forward voltage of the MOSFET's body diode.
Figure 7. Input Filter
Active Droop
The RC5057 includes active droop: as the output current increases, the output voltage drops. This is done in order to allow maximum headroom for transient response of the converter. The current is sensed by measuring the voltage across the high-side MOSFET during its on time. Note that this makes the droop dependent on the temperature of the MOSFET. However, when the formula given for selecting RS (current limit) is used, there is a maximum droop possible (-40mV), and when this value is reached, additional drop across the MOSFET will not cause any increase in droop--until current limit is reached. Additional droop can be added to the active droop using a discrete resistor (typically a PCB trace) outside the control loop, as shown in Figure 2. This is typically only required for the most demanding applications, such as for the next generation Intel processor (tolerance = +40/-70mV), as shown in Figure 2.
Output Filter Capacitors
The output bulk capacitors of a converter help determine its output ripple voltage and its transient response. It has already been seen in the section on selecting an inductor that the ESR helps set the minimum inductance, and the capacitance value helps set the maximum inductance. For most converters, however, the number of capacitors required is determined by the transient response and the output ripple voltage, and these are determined by the ESR and not the capacitance value. That is, in order to achieve the necessary ESR to meet the transient and ripple requirements, the capacitance value required is already very large. The most commonly used choice for output bulk capacitors is aluminum electrolytics, because of their low cost and low ESR. The only type of aluminum capacitor used should be those that have an ESR rated at 100kHz. Consult Application Bulletin AB-14 for detailed information on output capacitor selection.
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RC5057
PCB Layout Guidelines
* Placement of the MOSFETs relative to the RC5057 is critical. Place the MOSFETs such that the trace length of the HIDRV and LODRV pins of the RC5057 to the FET gates is minimized. A long lead length on these pins will cause high amounts of ringing due to the inductance of the trace and the gate capacitance of the FET. This noise radiates throughout the board, and, because it is switching at such a high voltage and frequency, it is very difficult to suppress. * In general, all of the noisy switching lines should be kept away from the quiet analog section of the RC5057. That is, traces that connect to pins 7, 9, 10, and 8 (LODRV, HIDRV, SW and VCCP) should be kept far away from the traces that connect to pins 3 through 5, and pin 11. * Place the 0.1F decoupling capacitors as close to the RC5057 pins as possible. Extra lead length on these reduces their ability to suppress noise. * Each VCC and GND pin should have its own via to the appropriate plane. This helps provide isolation between pins. * Place the MOSFETs, inductor, and Schottky as close together as possible for the same reasons as in the first bullet above. Place the input bulk capacitors as close to the drains of the high side MOSFETs as possible. In addition, placement of a 0.1F decoupling cap right on the drain of each high side MOSFET helps to suppress some of the high frequency switching noise on the input of the DC-DC converter. * Place the output bulk capacitors as close to the CPU as possible to optimize their ability to supply instantaneous current to the load in the event of a current transient. Additional space between the output capacitors and the CPU will allow the parasitic resistance of the board traces to degrade the DC-DC converter's performance under severe load transient conditions, causing higher voltage deviation. For more detailed information regarding capacitor placement, refer to Application Bulletin AB-5. * A PC Board Layout Checklist is available from Fairchild Applications. Ask for Application Bulletin AB-11.
Appendix
Worst-Case Formulae for the Calculation of Cout, R5, and Cin (Circuit of Figure 1 Only)
The following formulae design the RC5057 for worst-case operation, including initial tolerance and temperature dependence of all of the IC parameters (initial setpoint, reference tolerance and tempco, active droop tolerance, current sensor gain), the initial tolerance and temperature dependence of the MOSFET, and the ESR of the capacitors. The following information must be provided: VT+, the value of the positive transient voltage limit; |VT-|, the absolute value of the negative transient voltage limit; IO, the maximum output current; Vnom, the nominal output voltage; Vin, the input voltage (typically 5V); ESR, the ESR of the output caps, per cap (44m for the Sanyo parts shown in this datasheet); RD, the on-resistance of the MOSFET (10m for the FDB7030); RD, the tolerance of the current sensor (usually about 67% for MOSFET sensing, including temperature). Irms, the rms current rating of the input caps (2A for the Sanyo parts shown in this datasheet).
2 IO * Cin = Irms IO* RD * (1 + RD) * 1.10 50 * 10-6 Vnom Vin - Vnom Vin
Additional Information
For additional information contact Fairchild Semiconductor at http://www.fairchildsemi.com/cf/tsg.htm or contact an authorized representative in your area.
R5 =
The value of R5 must be 8.3K. If a greater values is calculated, RD must be reduced. Number of capacitors needed for Cout = the greater of:
X= ESR * IO VT-
or
ESR * IO VT+ -0.004 * Vnom + 14400 * IO * RD 18 * R5 * 1.1
Y=
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RC5057
PRODUCT SPECIFICATION
Example: Suppose that the transient limits are 134mV, current I is 14.2A, and the nominal voltage is 2.000V, using MOSFET current sensing and the usual caps. We have VT+ = |VT-| = 0.134, IO = 14.2, Vnom = 2.000, and RD = 0.67. We calculate:
2
R5 =
14.2 * 0.010 * (1 + 0.67) * 1.10 50 * 10-6
= 5.2K
X=
0.044 * 14.2 0.134
= 4.66
2.000 14.2 * 5 Cin = 2
-
2.000 5
0.044 * 14.2 Y= = 3.47 4 caps 0.134 - 0.004 * 2.000 + 14400 * 14.2 * 0.020 18 * 10400 * 1.1
= 4.28
Since X > Y, we choose X, and round up to find we need 5 capacitors for COUT.
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PRODUCT SPECIFICATION
RC5057
Mechanical Dimensions
16 Lead SOIC
Inches Min. A A1 B C D E e H h L N ccc Max. Millimeters Min. Max. Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5 2 2 5. "C" dimension does not include solder finish thickness. 6. Symbol "N" is the maximum number of terminals.
Symbol
.053 .069 .004 .010 .013 .020 .008 .010 .386 .394 .150 .158 .050 BSC .228 .010 .016 16 0 -- 8 .004 .244 .020 .050
1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.81 4.00 1.27 BSC 5.80 0.25 0.40 16 0 -- 8 0.10 6.20 0.50 1.27
3 6
16
9
E
H
1
8
D A1 A SEATING PLANE -C- LEAD COPLANARITY ccc C
h x 45 C
e
B
L
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RC5057
PRODUCT SPECIFICATION
Ordering Information
Product Number RC5057M Package 16 pin SOIC
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
2/10/00 0.0m 011 Stock#DS30005057 2000 Fairchild Semiconductor Corporation

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